Maxim RRFP1A/T Manual de usuario descargar pdf (Pagina 31)

Single-/Dual-Band 802.11a/b/g

World-Band Transceiver ICs

to the VCO drifting to an adjacent sub-band. In this

case, it is advisable to reprogram the PLL by either

manual or automatic sub-band selection.

Programmable Registers

The MAX2828/MAX2829 include 13 programmable, 18-

bit registers: 0, 1, standby, integer-divider ratio, frac-

tional-divider ratio, band select and PLL, calibration,

lowpass filter, Rx control/RSSI, Tx linearity/baseband

gain, PA bias DAC, Rx gain, and Tx VGA gain. The 14

most significant bits (MSBs) are used for register data.

The 4 least significant bits (LSBs) of each register con-

tain the register address. Data is shifted in MSB first.

The data sent to the devices, in 18-bit words, is framed

by CS. When CS is low, the clock is active and data is

shifted with the rising edge of the clock. When CS tran-

sitions high, the shift register is latched into the register

selected by the contents of the address bits. Only the

last 18 bits shifted into the device are retained in the

shift register. No check is made on the number of clock

pulses. For programming data words less than 14 bits

long, only the required data bits and the address bits

are required to be shifted, resulting in faster Rx and Tx

gain control where only the LSBs need to be pro-

DATA BIT

DEFAULT

DESCRIPTION

D13 0

MIMO Select. Set to 0 for normal

operation. Set to 1 for MIMO

applications.

D12 1 Set to 1

D11 0 Voltage Reference (Pin 23)

D10 0 PA Bias DAC, in Tx Mode

D9 0

D8 0

D7 0

D6 0

D5 0

D4 0

D3 0

Set to 0

D2 1

D1 1

D0 1

Set to 1

Table 10. Standby Register

(A3:A0 = 0010)

DEFAULT

ADDRESS

D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

(A3:A0)

TABLE

01000101000000

0000 —

00000011001010

0001 —

Standby

01000000000111

0010 10

Integer-Divider

Ratio

11000010100010

0011 11

Fractional-

Divider Ratio

01110111011101

0100 12

Band Select

and PLL

01100000100100

0101 13

Calibration

01110000000000

0110 14

Lowpass Filter

00000000101010

0111 15

Control/RSSI

00000000100101

1000 16

Linearity/Base-

band Gain

00001000000000

1001 17

PA Bias DAC

00001111000000

1010 18

Rx Gain

00000001111111

1011 19

Tx VGA Gain

00000000000000

1100 20

Table 9. Register Default/SPI Reset Settings

MAX2828/MAX2829

Maxim Integrated

1 2 ... 26 27 28 29 30 31 32 33 34 35 36 37 38 39

MAX2828/MAX2829 1

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