Maxim DS33Z41 Manual de usuario descargar pdf (Pagina 26)

0.2 BETWEEN CONNECTORS.

ALLOW USE OF A DIFFERENT PHY CARD IF DESIRED. PLACEMENT SHOULD ALLOW

ON Z44 CARD ALL 4 PORTS MUST BE PLACED WITH EQUAL SPACING AND A COMMON CENTER LINE

TESTPOINTS (SHOWN ABOVE) MUST BE PLACED THE SAME FOR EACH PORT TO

PLACEMENT NOTE:

LEDS NEED TO BE ATTACHED

OUTSIDE OF MODULE DUE TO

STRAP ADAPTING OPTION OF DP83847

COMPONETS FOR

C1 AND RBIAS MUST

BE PLACED CLOSE TO PIN

MII_CLK

RESET_B

LED_TX_ADD3

LED_COL_ADD1

LED_DPLX_ADD0

TXD0

TXD2

AN1

TXD1

MDC

10UF

5.1K

TX_CLK

TXD3

TX_EN

RXDV

RXD0

RXD1

RXD2

RXD3

10UF

10UF

10UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

LED_GDLINK_ADD2

30

LED_RX_ADD4

AN_V3_3

AN_V3_3

0.1UF

0.1UF

10UF

100O100MZH

RX_CLK

RX_ERR

COL_DET

RX_CRS

AN_EN

5.1K

AN0

5.1K

MDIO

0.1UF

10.0K

RBIAS

C1PIN

11/71(TOTAL)

BLOCK

NAME:

_mii_wan_dn.

PARENT

BLOCK:

\_z11andlan_dn\

PRINTED

Fri

Oct

20

10:50:42

2006

1/2(BLOCK)

09/16/2004

STEVE SCULLY

DS33Z11/41/44DK01A0

CR-11

:

@\_ztop_lib\.\_ztopdn_\(sch_1):page1_i5@\_ztop_lib\.\_z11top_dn\(sch_1):page1_i1@\_ztop_lib\.\_z11andlan_dn\(sch_1):page4_i32@\_ztop_lib\.\_mii_wan_dn\(sch_1):Page1

CR-11

:

@\_ztop_lib\.\_ztopdn_\(sch_1):page1_i5@\_ztop_lib\.\_z11top_dn\(sch_1):page1_i1@\_ztop_lib\.\_z11andlan_dn\(sch_1):page4_i32@\_ztop_lib\.\_mii_wan_dn\(sch_1):Page1

CR-11

:

@\_ztop_lib\.\_ztopdn_\(sch_1):page1_i5@\_ztop_lib\.\_z11top_dn\(sch_1):page1_i1@\_ztop_lib\.\_z11andlan_dn\(sch_1):page4_i32@\_ztop_lib\.\_mii_wan_dn\(sch_1):Page1

CR-11

:

@\_ztop_lib\.\_ztopdn_\(sch_1):page1_i5@\_ztop_lib\.\_z11top_dn\(sch_1):page1_i1@\_ztop_lib\.\_z11andlan_dn\(sch_1):page4_i32@\_ztop_lib\.\_mii_wan_dn\(sch_1):Page1

CR-11

:

@\_ztop_lib\.\_ztopdn_\(sch_1):page1_i5@\_ztop_lib\.\_z11top_dn\(sch_1):page1_i1@\_ztop_lib\.\_z11andlan_dn\(sch_1):page4_i32@\_ztop_lib\.\_mii_wan_dn\(sch_1):Page1

8B4^

1

3

2

JP14

1

3

2

JP15

1

3

2

JP09

RB07

RB52

RB55

R109

1

TP03

50

51

54

55

61

58

60

62

64

65

44

47

5

8

9

12

13

34

28

56

14

57

59

63

2

1

3

46

42

48

49

15

16

17

18

19

22

23

24

25

4

21

20

53

52

U04

R08

8B4^

8B4^

2

1

C30

2

1

C32

12C8<

8C5^

12C8<

8C5^

12C8<

8C5^

12C8<

8D5^

12C4<

8C5^

12C8<

8C5^

65

4

9

7

3

10

8

1

2

J13

12C5<

8C3^

12B5<

8C3^

8C3^

12C6<>

12B8<

8D3^

12B8<

8C3^

12B8<

8C3^

12B8<

8C3^

65

4

9

7

3

10

8

1

2

J14

2

1

CB63

2

1

CB238

2

1

C198

2

1

CB39

2

1

CB41

2

1

C16

1

2

L03

CB96

CB497

2

1

CB93

2

1

CB239

2

1

C207

2

1

CB194

PAGE:

DATE:

TITLE:

ENGINEER:

A A

B B

C C

D

D

1

1

2

2

3

3

4

45

56

6

7

7

8

8

IO

V3_3

V3_3

6

10

8

4

1

2

3

5

7

9

CONN_10P

V3_3

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

6

10

8

4

1

2

3

5

7

9

CONN_10P

IN

OUT

IN

IN

IN

V3_3

IN

IN

IN

CONTROL

DP83847_U1

RESERVED14

RESERVED15

LED_TX/PHYAD3

LED_GDLNK/PHYAD2

RESERVED3

MDC

MDIO

LED_DPLX/PHYAD0

LED_COL/PHYAD1

LED_RX/PHYAD4

LED_SPEED

AN_EN

AN_1

AN_0

X1

X2

C1

RESET*

RBIAS

RESERVED1

RESERVED2

VDD3

VDD2

VDD1

VDD/ANA_VDD

VDD/IO_VDD2

VDD/IO_VDD1

RESERVED9

RESERVED8

RESERVED7

RESERVED6

RESERVED5

RESERVED4

RESERVED11

RESERVED10

GND5

GND4

GND3

GND2

GND1

RESERVED18

RESERVED17

RESERVED16

RESERVED13

RESERVED12

V3_3

IO

IO

IO

IO

IO

IN

1 2 ... 21 22 23 24 25 26 27 28 29 30 31 ... 43 44

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