Maxim DS33Z41 Especificaciones descargar pdf (Pagina 70)

DS33Z41 Quad IMUX Ethernet Mapper

70 of 167

GL.RTCAL

Global Receive and Transmit Serial Port Clock Activity Latched Status

04h

Bit # 7 6 5 4 3 2 1 0

Name — — — RLCALS1 — — — TLCALS1

Default 0 0 0 0 0 0 0 0

Bit 4: Receive Serial Interface Clock Activity Latched Status 1 (RLCALS1). This bit is set to 1 if the receive

clock for Serial Interface 1 has activity. This bit is cleared upon read.

Bit 0: Transmit Serial Interface Clock Activity Latched Status 1 (TLCALS1). This bit is set to 1 if the transmit

clock for Serial Interface 1 has activity. This bit is cleared upon read.

GL.SRCALS

Global SDRAM Reference Clock Activity Latched Status

05h

Bit # 7 6 5 4 3 2 1 0

Name — — — — — — REFCLKS SYSCLS

Default 0 0 0 0 0 0 0 0

Bit 1: Reference Clock Activity Latched Status (REFCLKS). This bit is set to 1 if REF_CLK has activity. This

bit is cleared upon read.

Bit 0: System Clock Input Latched Status (SYSCLS). This bit is set to 1 if SYSCLKI has activity. This bit is

cleared upon read.

1 2 ... 65 66 67 68 69 70 71 72 73 74 75 ... 166 167

Sin comentarios

Maxim DS33Z41 Especificaciones Pagina 70