Maxim DS33R11 Manual de usuario

1 of 44 REV: 101405 GENERAL DESCRIPTION The DS33R11/DS33ZH11 design kit is an easy-to-use evaluation board for the DS33R11 and the DS33ZH

DS33R11DK/DS33ZH11DK 10 of 44 BASIC OPERATION Powering Up the Design Kit • Connect PCB 3.3V and GND banana plugs to power supply. A 2A supply is re

DS33R11DK/DS33ZH11DK 11 of 44 Basic DS33ZH11 Initialization This section covers the EEPROM methods for configuring the DS33ZH11. 1) If the HWMODE

DS33R11DK/DS33ZH11DK 12 of 44 LEDS, CONFIGURATION SWITCHES, JUMPERS, AND CONNECTORS The DS33Z11DK has several configuration switches, banana plugs,

DS33R11DK/DS33ZH11DK 13 of 44 SILKSCREEN REFERENCE FUNCTION BASIC SETTING SCHEMATIC PAGE DESCRIPTION JP01 3-pin jumper Pins 2+3 jumpered 10 Drives D

DS33R11DK/DS33ZH11DK 14 of 44 SILKSCREEN REFERENCE FUNCTION BASIC SETTING SCHEMATIC PAGE DESCRIPTION J28.4 DS3150 pin (ICE) — 0 = Normal RCLK/Norm

DS33R11DK/DS33ZH11DK 15 of 44 SILKSCREEN REFERENCE FUNCTION BASIC SETTING SCHEMATIC PAGE DESCRIPTION J31 Configuration pins (See next 10 rows for de

DS33R11DK/DS33ZH11DK 16 of 44 SILKSCREEN REFERENCE FUNCTION BASIC SETTING SCHEMATIC PAGE DESCRIPTION DS19, DS20, DS21 LED — 19 Activity LEDs for Eth

DS33R11DK/DS33ZH11DK 17 of 44 DS33R11DK/DS33ZH11DK INFORMATION For more information about the DS33R11DK/DS33ZH11DK, including software downloads, re

PAGE 01: DS33R11 AND DS33ZH11 DESIGN TOP LEVEL HIERARCHY BLOCKSPAGE 03: HIERARCHY BLOCKS FOR DS33R11, PROCESSOR AND ETHERNETONLY SIGNALS WITH IMPORT/O

GROUND TESTPOINTS2/2(BLOCK)STEVE SCULLYDS33ZH11-R11DK01A02/27(TOTAL)01/05/2005BLOCK NAME: _ztopdn_. PARENT BLOCK: <CON_PARENT_NAME>BABABABA21JB0

DS33R11DK/DS33ZH11DK 2 of 44 TABLE OF CONTENTS GENERAL DESCRIPTION ...

PAGES 12-17PAGES 04-05PAGES 06-11PROCESSOR HIERARCHY BLOCKR11 HIERARCHY BLOCKMII ETHERNET HIERARCHY BLOCKDS33R11 DESIGN KITPAGE NUMBERS (BOTTOM RIGHT)

BEGINNING OF MII ETHERNET HIERARCHY BLOCKPLACEMENT NOTE:LEDS NEED TO BE ATTACHEDOUTSIDE OF MODULE DUE TOBE PLACED CLOSE TO PINC1 AND RBIAS MUSTCOMPONE

RESISTORS FOR TD+-/RD+-SHOULD BE PLACED CLOSE TO XFRMSHOULD BE PLACED CLOSE TO PHYEND OF MII ETHERNET HIERARCHY BLOCKCAPS FOR XFRM CENTER TAPBLOCK NAM

BEGINNING OF DS33R11 HIERARCHY BLOCKDS33ZH11-R11DK01A0STEVE SCULLY1/6(BLOCK)6/27(TOTAL)01/05/2005BLOCK NAME: _z11andlan_dn. PARENT BLOCK: \_ds33r11dk_

STEVE SCULLY7/27(TOTAL)BLOCK NAME: _z11andlan_dn. PARENT BLOCK: \_ds33r11dk_design\01/05/20052/6(BLOCK)DS33ZH11-R11DK01A0ZJTCLKRDEN0RSER0TCLKI0TDEN0RC

FROM Z11 SYSCLKOSYNCHRONOUS DRAMMT48LC4M32B2 - 1 MEG X 32 X 4 BANKSBLOCK NAME: _z11andlan_dn. PARENT BLOCK: \_ds33r11dk_design\DS33ZH11-R11DK01A0STEVE

01/05/2005STEVE SCULLYDS33ZH11-R11DK01A0BLOCK NAME: _z11andlan_dn. PARENT BLOCK: \_ds33r11dk_design\4/6(BLOCK)9/27(TOTAL)RSTSHDNINOUTGNDSETOUTINVSS7VS

SERIAL SIGNALS WITH OFF PORT FLAGS GOTO THE 140 PIN WAN CONNECTORSJUMPERS FOR ETHERNET RSER RCLK RDEN - VALID COMBINATIONS:PLACE TESTPOINTS FOR ETHERN

SPARE INVERTERSALL UNMARKED BIAS RESISTORS ARE 10KEND OF DS33R11 HIERARCHY BLOCK6/6(BLOCK)STEVE SCULLYDS33ZH11-R11DK01A011/27(TOTAL)01/05/2005BLOCK NA

BEGINNING OF PROCESSOR HIERARCHY BLOCKBLOCK NAME: _motprocrescard_dn. PARENT BLOCK: \_ds33r11dk_design\PRINTED Fri Sep 23 11:01:52 200512/27(TOTAL)STE

DS33R11DK/DS33ZH11DK 3 of 44 COMPONENT LIST DESIGNATION QTY DESCRIPTION SUPPLIER/PART NUMBER C01, C28, CB03, CB49, CB136, CB146, CB192, CP01, CP2,

RESET AND CHIP CONFIGURATIONXTAL W/ PLLBOOT INTERNALD18 HAS A 10K LOAD TO GNDD18 HAS A 10.5K LOAD TO V3VBOOT EXTWHEN SET FORINTERN/EXTERNBOOTRESET CON

BUT DO NOT POPULATEJTAG CONFIGURATIONALIGN KEYPINONCETDIMMC2107ONCETDOPINTDI...FPGA+FLASH...PLACE PADS FOR CAP3/6(BLOCK)01/05/2005STEVE SCULLYDS33ZH11

MEM_SO / RUN_DRV INSTALL JUMPER TO RUN DEVICE DRIVERMEM_SI / TCLKEQRCLK INSTALL JUMPER TO SET TCLK=RCLKMEM_CS / EN_INTS INSTALL JUMPER TO ENABLE INTER

BLOCK NAME: _motprocrescard_dn. PARENT BLOCK: \_ds33r11dk_design\5/6(BLOCK)DS33ZH11-R11DK01A0STEVE SCULLY01/05/200516/27(TOTAL)21R221R1141312111098765

END OF PROCESSOR HIERARCHY BLOCK17/27(TOTAL)6/6(BLOCK)01/05/2005STEVE SCULLYDS33ZH11-R11DK01A0BLOCK NAME: _motprocrescard_dn. PARENT BLOCK: \_ds33r11d

PAGE NUMBERS (BOTTOM RIGHT) ARE LISTED BY BOTH THE PAGE NUMBER IN THE BLOCK, AND BY THE PAGE NUMBER WITHIN THE ENTIRE DESIGNCROSS REFERENCE INDICATORS

DS33ZH11 MII CLK IS GATED BY RESET160 US BEFORE RESET DEACTIVATESMII PHY REQUIRES MII CLK TO BE STABLE FORPRINTED Fri Sep 23 11:01:54 20052/2(BLOCK)19

SERIES TERMINATIONMII TX PINS USUALY HAVEZH11 PACKAGE ALLOWS FORCLOSE PLACEMENT, RESISTORS OMITTEDTHIS PAGE ARE 30 OHMUNMARKED RESISTORS ONBEGINING OF

CONFIG SWITCHES FOR Z11LOWLOWDS33ZH11-R11DK01A021/27(TOTAL)STEVE SCULLY01/05/20052/3(BLOCK)BLOCK NAME: _zh11_dn. PARENT BLOCK: \_ds33zh11dk_design\CS*

BE NON- SWAPABLEADDRESS PINS APPEAR THAT THEY SHOULDFROM Z11 SYSCLKOMT48LC4M32B2 - 1 MEG X 32 X 4 BANKSSYNCHRONOUS DRAMBLOCK NAME: _zh11_dn. PARENT BL

DS33R11DK/DS33ZH11DK 4 of 44 DESIGNATION QTY DESCRIPTION SUPPLIER/PART NUMBER J01, J05, J06, J18, J36 5 Terminal strip (10-pin, dual row, vertic

SPARE (SOCKETED) OSCILLATORUSE 34.368 MHZ FOR E3USE 44.736 MHZ FOR T3BEGINING AND END OF T3E3 LIU HIERARCHY BLOCKNETWORK INTERFACETXTIPRXTIPRXRINGTRAN

DS21348 LIU, TRANSFORMERS AND CONNECTORSBEGINING OF T1E1 LIU HIERARCHY BLOCK/BLOCK NAME: _te1liu_wan_dn. PARENT BLOCK: \_ds33zh11dk_design\01/05/20051

CONFIGURED FOR HW MODEUNMARKED BIAS RESISTORS ARE 1.0K OHMUSE 1.544MHZ FOR T1USE 2.048MHZ FOR E1L1, L2, PBEO, BPCLK = NCHARDWAREEND OF T1E1 LIU HIERAR

BEGINNING OF MII ETHERNET HIERARCHY BLOCKPLACEMENT NOTE:LEDS NEED TO BE ATTACHEDOUTSIDE OF MODULE DUE TOBE PLACED CLOSE TO PINC1 AND RBIAS MUSTCOMPONE

RESISTORS FOR TD+-/RD+-SHOULD BE PLACED CLOSE TO XFRMSHOULD BE PLACED CLOSE TO PHYEND OF MII ETHERNET HIERARCHY BLOCKCAPS FOR XFRM CENTER TAPRX_CLKTX_

DS33R11DK/DS33ZH11DK 5 of 44 DESIGNATION QTY DESCRIPTION SUPPLIER/PART NUMBER R07, R10, R12, R13, RB15 5 0Ω ±5%, 1/16W resistors (0603) Panasonic

DS33R11DK/DS33ZH11DK 6 of 44 DESIGNATION QTY DESCRIPTION SUPPLIER/PART NUMBER RB55, RB56, RB57, RB62, RB64, RB65, RB72, RB76, RB145, RB147, RB158,

DS33R11DK/DS33ZH11DK 7 of 44 DESIGNATION QTY DESCRIPTION SUPPLIER/PART NUMBER U11 1 DS33ZH11 ELITE 10/100 Ethernet transport over serial link 10mm

DS33R11DK/DS33ZH11DK 8 of 44 SYSTEM FLOORPLAN PC BOARD ERRATA • Center tap of T02 was not pulled to V3_3 in DS33R11DK/DS33ZH11DK01A0 re

DS33R11DK/DS33ZH11DK 9 of 44 FILE LOCATIONS This design kit relies upon several supporting files, which are provided on the CD and are available as